//**********************************************************
// bugs spotted by jade from gdatech.com
//**********************************************************

module test();

// I didn't handle ansi task args properly (got confused
//  because I expected them to be followed by a SMNT and
//  they can be followed by a signal def
task automatic v2k_task(
   input [31:0] str
);
reg[31:0] temp;

begin
   temp = str;
   $display( temp );
end
endtask

//
//
//
task null_ansi_port_list_task ();
begin
end
endtask

task noarg();
reg test;
begin
   test = 1;
end
endtask


endmodule


//************************************************************


module in #(
   parameter test = 0
) (
   input [test-1:0] in_sig,
   output [test-1:0] out_sig
);

localparam SM=1;
parameter named=0;

endmodule

module test2();

wire[31:0] in_wire, out_wire;
in #(32,1) in_inst( in_wire, out_wire );

endmodule



// testing no semicolon at end of task and function

module test3;

task t1;
reg x;
x=0
endtask

function f1(input y);
f1=y
endfunction

endmodule