The Verilog to html converter
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How signals are handledNew in v2html 6.0 is a popup window that appears when you click on a signal name.
The old way of linking signalsIf v2html is run with the -nsigpopup option then the signal popup window code is not generated. In this case signals are linked to enable you to follow a signal back to find the code that is driving it (even across module boundaries).
You might be better off following the example first, but if you're the theoretical type you might want to read what it is doing first!
Example - follow the instructions in the comments.
- When the signal name appears in a place where it is defined or is driving another signal it is linked to the first place where it is driven. A signal is driving when it is on the right hand side of an = or <= or is connected to an input. A signal is driven when it appears on the left hand side of a = or <= or is connected to an output.
- Otherwise the signal name is linked to where it defined
- The only exception to this is where the signal appears after the keyword input and the module is instantiated once only. In this case the signal name is linked to the place in the higher level module where the module is instantiated.
- v2html also allows you to go down into a submodule to see what is driving an output by linking the .out(...) in the instantiation to the place in the submodule where the output is first driven (inputs and inouts are not linked).
Here are a couple few more examples of things you can do:
- Going down example - follow the instructions in the comments to go down the hierarchy to find the driver.
- Going up and across example - follow the instructions in the comments to go up one level, across and down.
- Following logic - follow the instructions in the comments to follow through the logic.
© 1999-2009 Costas Calamvokis