The Verilog to html converter
I added Verilog 2001 (IEEE 1364-2001) support to v2html in version 7.0, some new constructs are ignored at the moment, but most are handled.
Here are the files I have been using to check v2html, let me know if you think that anything in there is not correct verilog 2001 code.
Here is a list of all the new constructs and the level of support:
|Construct||Level of Support|
|Combined port and data type declarations||Reg supported, others ignored|
|ANSI style input and output declarations||Supported|
|Module parameter port lists||Supported|
|Reg declaration initial assignments||Supported|
|`ifndef, `undef and `elsif||Supported|
|config ... endconfig||All text between ignored|
|localparam||Supported as parameter|
|generate ... endgenerate||All text between ignored|
|multidimensional arrays||Ranges ignored1|
|Signed numbers (8'shFF)||Ignored1|
|Comma separated sensitivity lists||Supported|
|Explicit named parameters||Ignored1|
|`file and `line||Ignored|
|(* Attributes *)||Supported|
|Array of instances||Range ignored|
|1. These things are ignored because v2html doesn't do anything with this type of information (yet).|
I plan to support config and generate when I have time.
© 1999-2009 Costas Calamvokis